표제지
목차
Abstract 11
1. 서론 12
2. IEC 60700-1 시험 파형 정의 15
2.1. IEC 60700-1 개요 15
2.2. 시험 파형의 정의 17
2.2.1. 6 펄스 다이리스터 컨버터 17
2.2.2. 다이리스터 밸브의 구조 20
2.3. IEC 60700 - 1 - 9: Periodic firing and extinction tests 21
2.3.1. Maximum continuous operating duty test 23
2.3.1.1. Maximum continuous firing voltage test 24
2.3.1.2. Maximum continuous recovery voltage test 25
2.3.2. Maximum temporary operating duty test 26
2.3.3. Minimum a.c. voltage test 28
2.3.3.1. Minimum delay angle 29
2.3.3.2. Minimum extinction angle 30
2.3.4. Temporary undervoltage test 32
2.3.5. Intermittent direct current test 33
3. 기존의 합성시험회로 36
3.1. ABB 사의 합성시험회로 37
3.1.1. ABB 사 합성시험회로의 구조와 동작 원리 37
3.1.2. ABB 사 합성시험회로의 실험 파형 분석 41
3.2. Siemens 사의 합성시험회로 44
3.2.1. Siemens 사 합성시험회로의 구조와 동작 원리 44
3.2.2. Siemens 사 합성시험회로의 시뮬레이션 파형 분석 45
3.3. Areva 사의 합성시험회로 47
3.3.1. Areva 사 합성시험회로의 구조와 동작 원리 47
3.3.2. Areva 사 합성시험회로의 시뮬레이션 파형 분석 49
3.4. 기존 합성시험회로의 비교 분석 50
4. 고효율 합성시험회로 51
4.1. 고효율 합성시험회로의 구성과 동작 원리 51
4.1.1. 고효율 합성시험회로 51
4.1.2. 고효율 합성시험회로의 동작 원리 53
4.1.2.1. 저전압-대전류원 회로의 동작 원리 54
4.1.2.2. 저전류-고전압원 회로의 동작 원리 56
4.2. 설계 방법 및 절차 60
4.2.1. 합성시험회로 설계 시 고려 사항 60
4.2.2. 저전압-대전류원 회로 설계 62
4.2.3. 저전류-고전압원 회로 설계 67
4.3. 시뮬레이션 및 실험 파형 73
4.3.1. 축소 모형에 대한 시뮬레이션 75
9.3.1. Maximum continuous operating duty tests 75
9.3.2. Maximum temporary operating duty test (α=90 [°]) 76
9.3.3. Minimum a.c. voltage tests 77
9.3.4. Temporary undervoltage test 78
9.3.5. Intermittent direct current tests 78
4.3.2. 축소 모형에 대한 실험 파형 80
9.3.1. Maximum continuous operating duty tests 81
9.3.2. Maximum temporary operating duty test (α=90 [°]) 82
9.3.3. Minimum a.c. voltage tests 83
9.3.4. Temporary undervoltage test 84
9.3.5. Intermittent direct current tests 85
5. 보조 전원이 개선된 합성시험회로 87
5.1. 보조 전원이 개선된 합성시험회로의 구성과 동작 원리 87
5.1.1. 보조 전원이 개선된 합성시험회로 87
5.1.2. 보조 전원이 개선된 합성시험회로의 동작 원리 88
5.2. 설계 방법 및 절차 93
5.2.1. 보조 전원 회로 설계 절차 93
5.3. 시뮬레이션 및 실험 파형 96
5.3.1. 축소 모형에 대한 시뮬레이션 98
9.3.1. Maximum continuous operating duty tests 98
5.3.2. 축소 모형에 대한 실험 파형 100
9.3.1. Maximum continuous operating duty tests 101
6. 결론 103
Reference 105
부록 112
Table 2-1. Summary of type test 16
Table 2-2. Thyristor level faults permitted during type tests 22
Table 2-3. Subclause of 9-Periodic firing and extinction tests 23
Table 3-1. Comparison of conventional synthetic test circuit 50
Table 4-1. VTH(0) and Req of semiconductor type(이미지참조) 61
Table 4-2. Specifications of HVDC system for high-efficiency STC 73
Table 4-3. Design requirements of high-efficiency STC 73
Table 4-4. VTH(0) and Req of semiconductor for high-efficiency STC(이미지참조) 74
Table 4-5. Designed parameters of high-efficiency STC 74
Table 5-1. Specifications of HVDC system for STC with improved auxiliary source 96
Table 5-2. Design requirements of STC with improved auxiliary source 96
Table 5-3. VTH(0) and Req of semiconductor for STC with improved auxiliary source(이미지참조) 97
Table 5-4. Designed parameters of STC with improved auxiliary source 97
Table 5-5. Comparison of conventional and proposed two STCs 102
Fig. 2.2.1. Simulation circuit for HVDC system 18
Fig. 2.2.2. Simulation waveforms of HVDC operations 18
Fig. 2.2.3. Test waveforms for thyristor valve (α=30 [°]) 19
Fig. 2.2.4. Structure of thyristor valve 20
Fig. 2.3.1. Simulation waveforms for Maximum continous operating duty tests 24
Fig. 2.3.2. Test waveforms for Maximum continuous operating duty test 26
Fig. 2.3.3. Simulation and test waveforms for Maximum temporary operating duty test 28
Fig. 2.3.4. Simulation and test waveforms for Minimum delay angle 30
Fig. 2.3.5. Simulation and test waveforms for Minimum extinction angle 31
Fig. 2.3.6. Simulation and test waveforms for Temporary undervoltage test 33
Fig. 2.3.7. Simulation and test waveforms for Intermittent direct current test (α=90 [°]) 34
Fig. 2.3.8. Simulation and test waveforms for Intermittent direct current test (α=20 [°]) 35
Fig. 3.1.1. Test current and voltage waveforms for thyristor valve test 36
Fig. 3.1.2. ABB's synthetic test circuit 37
Fig. 3.1.3. Test waveforms and circuit diagram of ABB's STC 38
Fig. 3.1.4. Several test waveforms of ABB's STC 43
Fig. 3.2.1. Test waveforms and circuit diagram of Siemens' STC 44
Fig. 3.2.2. Several test waveforms of Siemens' STC 46
Fig. 3.3.1. Test waveforms and circuit diagram of Areva's STC 48
Fig. 3.3.2. Simulation test waveforms of Areva's STC 49
Fig. 4.1.1. Proposed high-efficiency STC 53
Fig. 4.1.2. Test waveforms and switching signals of high-effiency STC 53
Fig. 4.1.3. Current path in each mode of low-voltage high-current source 55
Fig. 4.1.4. Current path in each mode of high-voltage low-current source 57
Fig. 4.2.1. Equivalent circuit of power semiconductors 60
Fig. 4.2.2. i - v characteristics graph of power semiconductors 61
Fig. 4.2.3. Characteristics of test current 62
Fig. 4.2.4. Current path in Mode-2 of Current source 63
Fig. 4.2.5. Current path in Mode-1 of Current source 64
Fig. 4.2.6. tq parameter of T2563N thyristor(이미지참조) 65
Fig. 4.2.7. Factors affecting tq(이미지참조) 66
Fig. 4.2.8. Waveforms of i and v during thyristor turn-off 66
Fig. 4.2.9. Characteristics of test voltage and resonant current 67
Fig. 4.2.10. Equivalent circuit when current injection 68
Fig. 4.2.11. Equivalent circuit of when VCres reversal(이미지참조) 70
Fig. 4.2.12. Equivalent circuit when charging VCres(이미지참조) 71
Fig. 4.2.13. Equivalent circuit when charging VCcha(이미지참조) 72
Fig. 4.3.1. Simulation circuit of high-efficiency STC with scale down 75
Fig. 4.3.2. Simulation waveforms of Maximum continuous operating duty tests 76
Fig. 4.3.3. Simulation waveforms of Maximum temporary operating duty test (α=90 [°]) 76
Fig. 4.3.4. Simulation waveforms of Minimum a.c. voltage tests 77
Fig. 4.3.5. Simulation waveforms of Temporary undervoltage test 78
Fig. 4.3.6. Simulation waveforms of Intermittent direct current tests 79
Fig. 4.3.7. Hardware configuration of high-efficiency STC with scale down 80
Fig. 4.3.8. Experimental waveforms of Maximum continuous operating duty tests 81
Fig. 4.3.9. Experimental waveforms of maximum Temporary operating duty test (α=90 [°]) 82
Fig. 4.3.10. Experimental waveforms of Minimum a.c. voltage tests 83
Fig. 4.3.11. Experimental waveforms of Temporary undervoltage test 84
Fig. 4.3.12. Experimental waveforms of Intermittent direct current tests 85
Fig. 5.1.1. Proposed two types of STC circuits 88
Fig. 5.1.2. Test waveforms and switching signals of STC with improved auxiliary source 89
Fig. 5.1.3. Current path in each mode of STC with improved auxiliary source 91
Fig. 5.2.1. Equivalent circuit of Mode V 93
Fig. 5.2.2. Vrm versus icur and CS(이미지참조) 95
Fig. 5.3.1. Simulation waveforms of STC with improved auxiliary source 99
Fig. 5.3.2. Experimental setup for STC with improved auxiliary source 100
Fig. 5.3.3. Experimental waveforms of STC with improved auxiliary source 101