표제지
목차
Abstract 11
제1장 서론 14
1.1. 연구배경 14
1.2. 연구목적 및 내용 17
제2장 디지털 통신 20
2.1. GMSK 변조 20
2.1.1. MSK(Minimum Shift Keying) 20
2.1.2. GMSK(Gaussian Minimum Shift Keying) 23
2.2. Two-point 변조 31
2.2.1. PLL(Phase Locked Loop) 31
2.2.2. VCO에 변조신호의 삽입 33
2.2.3. 주 발진기에 변조신호의 삽입 36
2.2.4. VCO와 주 발진기에 변조신호의 삽입 39
2.3. 직접 디지털 FSK 변조 41
2.3.1. 직접 디지털 FSK 변조 개요 41
2.3.2. 직접 디지털 FSK 변조 설계 고려사항 42
제3장 MOB-AIS 요건 분석 46
3.1. MOB-AIS 장치의 특징 46
3.2. 물리계층 요구사항 분석 47
3.3. 링크 계층 요구사항 분석 52
3.3.1. 부-계층 1. 매체 접속 제어 (Medium Access Control, MAC) 52
3.3.2. 부-계층 2. 데이터 링크 서비스 (Data Link Service, DLS) 55
3.3.3. 부-계층 3. 링크 관리 실체 (Link Management Entity, LME) 60
3.4. 네트워크 계층 요구사항 분석 72
3.5. 전송 계층 요구사항 분석 72
3.5.1. 전송 패킷 74
3.5.2. 표시 인터페이스 프로토콜 74
제4장 MOB-AIS 장치의 설계 76
4.1. 변조기 설계 76
4.1.1. FSK 변조기 설계 76
4.2. 증폭기 설계 87
4.2.1. RF5110G를 이용한 150MHz FM 설계 87
4.3. GPS 수신기 설계 89
4.3.1. GPS 수신기 설계 일반사항 89
4.3.2. NEO-6 칩셋 특성 89
4.4. MOB-AIS 프로토콜의 설계 93
4.4.1. 시분할 다중접속 전송 요구사항 93
4.4.2. 시분할 다중접속 전송 구현 97
4.4.3. 동기 요구사항 구현 100
제5장 MOB-AIS 장치의 제작 및 성능 분석 102
5.1. 송신기 제작 102
5.1.1. 송신기 회로 제작 102
5.1.2. 송신기 Firmware 개발 107
5.1.3. 안테나 제작 110
5.1.4. AIS 수신기 튜닝 111
5.2. 성능 검증 118
5.2.1. 송신기 기술기준(안) 118
5.2.2. 송신기 성능 검증 120
제6장 결론 130
참고문헌 132
Table 3-1. Required Parameter Setting for Burst transmission 47
Table 3-2. Required Setting of Physical layer constants 47
Table 3-3. Modulation Parameter of Physical layer 48
Table 3-4. Minimum required transmitter characteristics 48
Table 3-5. Definition of Timing for Fig. 3-1 49
Table 3-6. Parameters for TDMA synchronization 52
Table 3-7. Summary of the Default Transmission Packet 58
Table 3-8. Parameters for ITDMA Scheduling 64
Table 3-9. Parameters for RATDMA Scheduling 66
Table 3-10. ITDMA Communication State 71
Table 3-11. Maximum number of bit stuffing 74
Table 4-1. MULTI Application Example 82
Table 4-2. Approximate VCO Range and VCO Gain 84
Table 4-3. FSK Step Equation 85
Table 4-4. Available protocol from GPS receiver chipset 91
Table 4-5. GPS Antenna Specifications 91
Table 4-6. AIS Message 1 97
Table 4-7. AIS Message 14 100
Table 5-1. AMRD Log message from AIS Message 124
Fig. 1-1. International Standard AIS-MOB System 17
Fig. 2-1. Concept of a minimum Shift Keying. 21
Fig. 2-2. MSK waveform and equivalent equation 22
Fig. 2-3. GMSK implementation using FSK modulation of FM VCO 23
Fig. 2-4. GMSK implemention using QPSK 24
Fig. 2-5. Impulse response of Gaussian LPF 25
Fig. 2-6. The start of data stream through the filter 26
Fig. 2-7. Individual shapes of pulse indicated to data stream 27
Fig. 2-8. b(t) function 27
Fig. 2-9. c(t) function 28
Fig. 2-10. I baseband signal 28
Fig. 2-11. Q baseband signal 29
Fig. 2-12. GMSK modulated signal m(t) 30
Fig. 2-13. Typical PLL 32
Fig. 2-14. A modulated signal insertion to the VCO 33
Fig. 2-15. Signal flow chart according to a modulated signal insertion to the VCO 34
Fig. 2-16. High pass modulating response regarding to VCO insertion 36
Fig. 2-17. A modulated signal insertion to the master oscillator 37
Fig. 2-18. Signal flow chart according to a modulated signal... 37
Fig. 2-19. Low pass modulating response regarding to master oscillator 38
Fig. 2-20. A modulated signal insertion to both master oscillator and VCO 39
Fig. 2-21. Signal flow chart according to a modulated signal... 39
Fig. 2-22. Direct Digital FSK Modulation Workflow 41
Fig. 2-23. GMSK de-modulator of Limit/Frequency discriminator 42
Fig. 3-1. Transmitter output envelop versus time 49
Fig. 3-2. Emission Mask 50
Fig. 3-3. Burst transmissions in active mode 51
Fig. 3-4. Slot Access 54
Fig. 3-5. Transmission Packet 56
Fig. 3-6. Training Sequence 56
Fig. 3-7. Transmission Timing 58
Fig. 3-8. Uniform Reporting Rate using one Channel 62
Fig. 3-9. Initialization Phase 67
Fig. 3-10. Flow chart from First Frame Phase to Continuous operation Phase 68
Fig. 3-11. Flow chart in Continuous Operation Phase 69
Fig. 3-12. ITDMA Message Structure 70
Fig. 3-13. VDM protocol of IEC61162 75
Fig. 4-1. LMX2571 chipset pin configuration 76
Fig. 4-2. LMX2571 Schematic 77
Fig. 4-3. LMX2571 basic design using TICS Pro 78
Fig. 4-4. 19.2MHz VCTCXO type Oscillator 79
Fig. 4-5. Expected Output wave form from 19.2MHz VCTCXO 80
Fig. 4-6. Integrated Loop Filter 83
Fig. 4-7. n-pole's Loop Filter 83
Fig. 4-8. General FSK Definition 86
Fig. 4-9. Over-Sampling Modulation Signal 86
Fig. 4-10. RF5110G 153MHz Gain and Efficiency Versus Pout/VCC[이미지참조] 88
Fig. 4-11. 150MHz FM Amplifier Stage Design using the RF5110G 88
Fig. 4-12. GPS Receiver's Internal Block Diagram 90
Fig. 4-13. VSWR measurements 92
Fig. 4-14. Measurement result(Gain, Radiation Pattern) 92
Fig. 4-15. Burst transmission in active mode 93
Fig. 5-1. STM32L432xx and it's peripheral device circuit diagram 103
Fig. 5-2. Register Maps of LMX2571 104
Fig. 5-3. LMX2571 and Final Amplifier's circuit diagram 105
Fig. 5-4. Front and rear PCB / manufactured MOB-AIS Tx 106
Fig. 5-5. IAR Software Installation Window 107
Fig. 5-6. Interface board for Program Downloading using JTAG 108
Fig. 5-7. Firmware File Directory Description 109
Fig. 5-8. Antenna Design 110
Fig. 5-9. Antenna VSWR Measurement 111
Fig. 5-10. CMX7032 and peripheral circuit diagram 112
Fig. 5-11. MON-AIS Receiver RF block diagram 114
Fig. 5-12. Dual Channel AIS Receiver's PCB 115
Fig. 5-13. 160.900MHz regional channel setting via IEC 61162 interface 116
Fig. 5-14. Spectrum Mask of AIS Burst Transmission 120
Fig. 5-15. Prototype MOB-AIS and experiment configuration 121
Fig. 5-16. The Spectrum Results of MOB-AIS 122
Fig. 5-17. Experimental Configuration for Data transmission between MOB-AIS 123
Fig. 5-18. Transformation of Receive data 128
Fig. 5-19. Data Presentation for Ship's AIS and MOB-AIS test mode 129
Fig. 5-20. Data Presentation for Ship's AIS and MOB-AIS active mode 129