Title Page

Contents

Abstract 14

Chapter 1. Introduction 17

1.1. Scaling of MOSFET devices 17

1.2. High-k/metal gate technology 21

1.2.1. High-k dielectrics 21

1.2.2. Metal gate 24

1.3. Next-generation channel materials 25

1.3.1. Necessity of Si1-xGex channel[이미지참조] 25

1.3.2. Issues with channel materials containing germanium 27

1.4. Objectives 29

1.5. Experimental procedure 31

1.5.1. Formation of high-k gate dielectrics using ALD 31

1.5.2. Capacitor formation 35

1.5.3. Post-metallization annealing 40

1.5.4. Measurement of electrical properties 41

1.5.5. Microstructure and chemical analyses 42

1.6. References 43

Chapter 2. ALD high-k gate dielectrics on Si for gate-all-around (GAA) metal-oxide-semiconductor field-effect transistors (MOSFETs) 47

2.1. Motivation 47

2.2. High-k dielectrics on ultra-thin Si channel 48

2.2.1. Preparation for electrical evaluation of ultra-thin silicon channel 48

2.2.2. Electrical properties of high-k dielectrics on ultrathin Si channel 50

2.3. Effect of residual Ge during Si channel formation 52

2.3.1. Chemical etching of Si1-xGe x layer for Si channel formation 52

2.3.2. Electrical properties of high-k dielectrics on Si after Si1-xGex etching: effects of residual Ge atoms[이미지참조] 53

2.3.3. Approaches to remove residual Ge atoms for Si channel formation 65

2.4. Summary 67

2.5. References 69

Chapter 3. ALD-ZrO₂ gate dielectrics on Si1-xGex for next-generation GAA MOSFETs[이미지참조] 70

3.1. Motivation 70

3.2. Deposition temperature dependence of ALD-ZrO₂ on Si 70

3.3. Electrical properties of ALD-ZrO₂ on Si1-xGex (x＝0, 0.15, and 0.3)[이미지참조] 74

3.4. Interface engineering of ALD-ZrO2/Si1-xGex using an Al₂O₃ interfacial layer[이미지참조] 74

3.5. Summary 80

3.6. References 81

Chapter 4. ALD-HfO₂ gate dielectrics on Si1-xGex for next-generation GAA MOSFETs[이미지참조] 83

4.1. Motivation 83

4.2. Deposition temperature dependence of ALD-HfO₂ on Si1-xGex (x＝0, 0.15, and 0.3)[이미지참조] 83

4.3. Deposition and PMA temperature dependence of ALD-HfO₂ on Si0.7Ge0.3[이미지참조] 87

4.4. Interface engineering of ALD-HfO2/Si1-xGex using an Al₂O₃ interfacial layer and O₃ reactant[이미지참조] 89

4.5. Summary 93

4.6. References 94

Chapter 5. Effects of post-metallization annealing: high-pressure annealing in H₂ and D₂ 96

5.1. Motivation 96

5.2. Effects of PMA environment on the electrical characteristics of ALD-HfO₂ on Si0.7Ge0.3[이미지참조] 97

5.3. Optimization PMA temperature for ALD-HfO2/Si0.7Ge0.3 capacitors[이미지참조] 109

5.4. Summary 114

5.5. References 115

Chapter 6. Conclusion and future works 118

6.1. Conclusion 118

6.2. Suggestion for future works 119

Abstract (korean) 121

Table 1.1. Various properties of MO precursors. 33

Table 1.2. Specifications of ALD process. 34

Table 1.3. Specifications of the Si1-xGex wafers used in this experiment.[이미지참조] 36

Table 1.4. Process conditions for the DC magnetron sputtering. 39

Table 2.1. Annealing conditions in 100% N₂ atmosphere using a furnace. 59

Figure 1.1. Schematic diagram of MOSFETs showing (a) off-state without channel formation and (b) on-state with channel formation. 18

Figure 1.2. Roadmap of Intel's semiconductor process. 19

Figure 4.3. (Top) Various types of nanosheet stack structures at constant active width for GAA MOSFETs in comparison with FinFET. (Bottom) Process steps and corresponding cross-... 20

Figure 1.4. Barrier heights and dielectric constants of high-k dielectrics. 23

Figure 1.5. Relationship between permittivity and band gap of high-k dielectric materials. 23

Figure 1.6. Physical properties of Si1-xGex.[이미지참조] 26

Figure 1.7. Possible reactions occurring at GeO₂/Ge interface at temperatures above 450 °C. 28

Figure 1.8. Illustration showing the objectives of this thesis. 30

Figure 1.9. Schematic diagram of ALD process. 33

Figure 1.10. (a) Image of the ALD equipment and (b) schematic diagram of the ALD system. 33

Figure 1.11. Ellipsometry for thickness measurement of high-k dielectrics grown by ALD. 37

Figure 1.12. Schematic diagram of process sequences for MOS capacitor formation. 38

Figure 1.13. DC magnetron sputtering system for metal electrode deposition. 39

Figure 1.14. Equipment used for (a) forming gas annealing and (b) high-pressure annealing. 40

Figure 2.1. Thickness control of top Si film in a SOI wafer. 49

Figure 2.2. Process flow for electrical evaluation of high-k dielectrics on SOI substrates. 49

Figure 2.3. Multi-frequency C-V curves of HfO₂ films on (a) bulk Si and (b) SOI wafers. 50

Figure 2.4. C-V characteristics of HfO₂ capacitors formed on ultrathin Si films with thicknesses of (a) 40, (b) 30, (c) 20, (d) 15, (e) 10 nm, and (f) 5 nm. (g) Variation of flatband voltage (VFB)...[이미지참조] 51

Figure 2.5. Atomic force microscopy (AFM) measurement results of Si surface after Si1-xGex etching.[이미지참조] 53

Figure 2.6. (a) C-V at 100 kHz, (b) VFB, and (c) Dit characteristics of HfO₂/Si MOS capacitors fabricated after etching of Si1-xGex layers with different Ge concentration.[이미지참조] 55

Figure 2.6. (a) Comparison of doping concentration change (Nx/Na) for each Si substrate after Si1-xGex etching and (b) calculated values of NB and △Qf/q for each specimen.[이미지참조] 56

Figure 2.7. ToF-SIMS analysis of Ge atoms on Si surface after Si1-xGex etching.[이미지참조] 57

Figure 2.8. (a) VFB and (b) Dit characteristics of HfO₂/Si capacitors fabricated after annealing at various temperatures and Si0.7Ge0.3 etching.[이미지참조] 59

Figure 2.9. AFM measurement results of Si surface after annealing and Si0.7Ge0.3 etching.[이미지참조] 60

Figure 2.10. ToF-SIMS analysis result of Ge atoms remained on Si surface after annealing and Si0.7Ge0.3 etching.[이미지참조] 61

Figure 2.11. AFM measurement result of Si surface after annealing and Si0.7Ge0.3 etching.[이미지참조] 63

Figure 2.12. (a) Dit distribution within the Si band gap and (b) leakage current at -1 V for the Al₂O₃/Si capacitors. After annealing under various conditions (600-800 °C, 1-5 hr), the Si...[이미지참조] 64

Figure 2.13. (a) Dit distribution within the Si band gap and (b) leakage current at │VG-VFB│＝1 V for the Al₂O₃/Si capacitors after sacrificial oxidation process.[이미지참조] 66

Figure 2.14. (a) Dit distribution within the Si band gap and (b) leakage current at │VG-VFB│＝1 V for the Al₂O₃/Si capacitors after ICP remote H₂ treatments at different plasma powers.[이미지참조] 66

Figure 3.1. Cross-sectional HADDF TEM images of ALD-ZrO₂ films deposited on Si at (a) 200, (b) 250, and (c) 300 °C. 72

Figure 3.2. C-V characteristics of ZrO₂/Si capacitors as a function of ALD temperatures: (a) 200, (b) 250, and (c) 300 °C. (d) CET and dielectric constant, and (e) VFB and hysteresis values... 73

Figure 3.3. C-V characteristics of (a) ZrO₂/Si, (b) ZrO2/Si0.85Ge0.15, and (c) ZrO2/Si0.7Ge0.3 capacitors. (d) Dit distributions within the Si1-xGex band gap for the ZrO2/Si1-xGex (x＝0, 0.15,...[이미지참조] 77

Figure 3.4. C-V characteristics of Al2O3/Si0.7Ge0.3 capacitors with different ALD temperatures ((a, d) 200, (b, e) 250, and (c, f) 300 °C) and oxidants ((a-c) H₂O and (d-f) O₃ reactants). The...[이미지참조] 77

Figure 3.5. Dit distributions within the Si0.7Ge0.3 band gap for the Al₂O₃ (H₂O or O₃ oxidants)/Si0.7Ge0.3 and ZrO2/Si0.7Ge0.3 capacitors.[이미지참조] 78

Figure 3.6. (a) Dit distributions within the Si0.7Ge0.3 band gap and (b) leakage current characteristics under a gate injection condition for the ZrO2/Si0.7Ge0.3 and ZrO₂/Al₂O₃ (ALD...[이미지참조] 79

Figure 4.1. C-V characteristics of (a) HfO₂/Si, (b) HfO2/Si0.85Ge0.15, and (c) HfO2/Si0.7Ge0.3 capacitors. (d) CET as a function of the ALD temperature for the HfO2/Si1-xGex (x＝0, 0.15, and...[이미지참조] 85

Figure 4.2. Dit distribution within the Si1-xGex band gap for the HfO2/Si1-xGex (x＝0, 0.15, and 0.3) capacitors.[이미지참조] 86

Figure 4.3. C-V characteristics of HfO2/Si0.7Ge0.3 capacitors with different PMA temperatures: (a) 200, (b) 300, and (c) 400 °C. The C-V curve was normalized for fair comparison of...[이미지참조] 88

Figure 4.4. Multi-frequency C-V characteristics of (a) HfO2/Si0.7Ge0.3 and (b) HfO2/Al2O3/Si0.7Ge0.3 samples. (c) Corresponding Dit distributions within the Si0.7Ge0.3 band gap....[이미지참조] 90

Figure 4.5. C-V characteristics of HfO2/Si0.7Ge0.3 capacitors with different ALD-HfO₂ temperatures using O₃ reactant: (a) 200, (b) 250, and (c) 300 C. (d) Dit distributions within the...[이미지참조] 91

Figure 4.6. Electrical properties of HfO2/Si0.7Ge0.3 according to reactant types (H₂O vs. O₃): (a) CET distribution, (b) Dit distribution, and (c) leakage current.[이미지참조] 92

Figure 5.1. (a-c) Frequency-dependent C-V characteristics and (d-f) cross-sectional TEM images of HfO2/Si0.7Ge0.3 capacitors after different PMA conditions: (a, d) conventional FGA, (b,...[이미지참조] 99

Figure 5.2. Frequency-dependent G-V characteristics of HfO2/Si0.7Ge0.3 capacitors after different PMA conditions: (a) conventional FGA, (b) H₂-HPA, and (c) D₂-HPA. All the PMA...[이미지참조] 100

Figure 5.3. Capacitance ratios (Chump/Cmax) calculated using the C-V curves measured at the lowest frequency of 100 Hz. Cmax is the accumulation capacitance measured at -1.5 V and Chump...[이미지참조] 101

Figure 5.4. (a) Dit distribution within the Si0.7Ge0.3 band gap and (b) leakage current characteristics under a gate injection condition for the HfO2/Si0.7Ge0.3 capacitors after different...[이미지참조] 102

Figure 5.5. Statistical variation of minimum Dit for the HfO2/Si0.7Ge0.3 capacitors after different PMA conditions. All the PMA was conducted at 300 °C for 30 min. The error bars were drawn...[이미지참조] 103

Figure 5.6. Additionally measured leakage current characteristics under a gate injection condition for the HfO2/Si0.7Ge0.3 capacitors after different PMA conditions. All the PMA was...[이미지참조] 104

Figure 5.7. SILC characteristics under a gate injection condition for the HfO2/Si0.7Ge0.3 capacitors after different PMA conditions: a) FGA, b) H₂-HPA, and c) D₂-HPA. All the PMA...[이미지참조] 106

Figure 5.8. Statistical distribution of SILC characteristics shown in Figure 5.7. For error bar calculations, ten capacitors were measured for each sample split. The leakage current after stress... 107

Figure 5.9. Schematic diagram of the SILC measurement 108

Figure 5.10. Frequency-dependent C-V characteristics for the HfO2/Si0.7Ge0.3 capacitors as functions of the environment (FGA, H₂-HPA, and D₂-HPA) and temperature (300-500 °C). The...[이미지참조] 111

Figure 5.11. (a) Dit distribution within the Si0.7Ge0.3 band gap and (b) leakage current at -1.5 V for the HfO2/Si0.7Ge0.3 capacitors as functions of the environment (FGA, H₂-HPA, and D₂-HPA)...[이미지참조] 112

Figure 5.12. Leakage current characteristics under both gate and substrate injection conditions (negative and positive voltages, respectively) for the HfO2/Si0.7Ge0.3 capacitors after different...[이미지참조] 113