Title Page
Abstract
Contents
Abbreviations 11
Ⅰ. INTRODUCTION 12
1.1. MOTIVATION AND GOALS 12
1.2. ANALYSIS OF THREE-LEVEL INVERTER 14
1.3. DISSERTATION ORGANIZATION 20
Ⅱ. CONVENTIONAL METHODS FOR CMV REDUCTION 21
2.1. ANALYSIS OF COMMON-MODE VOLTAGE IN THREE-LEVEL INVERTER 21
2.2. CONVENTIONAL METHODS TO REDUCE CMV IN THREE-LEVEL INVERTER 22
2.2.1. ZERO-CMV METHODS 23
2.2.2. LMZVM AND LMSVM METHODS 25
2.2.3. ETC. (OTHER METHODS FOR CMV REDUCTION) 28
Ⅲ. PROPOSED METHOD TO REDUCE CMV 30
3.1. A CARRIER-BASED PWM USING POD METHOD 30
3.2. A NEW LIMITED RANGE OF ZERO-SEQUENCE VOLTAGE 38
3.3. THE EFFECT OF DEAD-TIME 40
3.4. OPTIMIZATION OF THE LIMITED RANGE 44
Ⅳ. SIMULATION RESULTS 46
4.1. SIMULATION SETUP 46
4.2. SIMULATION RESULTS 47
Ⅴ. CONCLUSIONS 72
5.1. CONCLUSIONS AND FUTURE CHALLENGES 72
5.2. CONTRIBUTIONS 75
References 76
Curriculum Vitae 84
Table.2.1.1. Relationship between voltage vectors and CMV 22
Table.4.1.1. Parameters for simulation 47
Fig.1.1.2. The CMV of the three-level inverter 13
Fig.1.2.1. Configuration of the three-level NPC inverter 14
Fig.1.2.2. Voltage vectors in the three-level inverter 15
Fig.1.2.3. Effects of voltage vectors on the NPV 18
Fig.2.2.1. Voltage vector spaces of Zero-CMV methods 23
Fig.2.2.2. Voltage vector space of the LMZVM method 26
Fig.2.2.3. Small vector selected depending on the LMSVM method 27
Fig.2.2.4. The modulation waveforms and carrier waveforms (a) Double modulation method (b) VFC method 28
Fig.3.1.1. Closed loop for the δVdc control[이미지참조] 31
Fig.3.1.2. Definitions to calculate average of neutral point current 32
Fig.3.1.3. Voltage vectors for CMV Reduction (marked in blue) 34
Fig.3.1.4. The change of the selectable vectors for CMV reduction 35
Fig.3.1.5. Carrier waveform after applying the POD method 36
Fig.3.1.6. The reduced CMV magnitudes by applying the POD method 37
Fig.3.1.7. Use of the voltage vectors with high CMV magnitudes 37
Fig.3.2.1. The CMV pulse when vmed* ≥ 0[이미지참조] 38
Fig.3.2.2. The CMV pulse when vmed* 〈 0[이미지참조] 38
Fig.3.3.1. Commutation from switching state 0 to 1 with iₐₛ 〉 0 41
Fig.3.3.2. Commutation from switching state 0 to 1 with iₐₛ 〈 0 41
Fig.3.3.3. Commutation from switching state 0 to -1 with iₐₛ 〉 0 42
Fig.3.3.4. Commutation from switching state 0 to -1 with iₐₛ 〈 0 42
Fig.3.3.5. The impact of dead-time on the output voltage when Vα* 〉 0[이미지참조] 43
Fig.3.3.6. The impact of dead-time on the output voltage when Vα* 〈 0[이미지참조] 43
Fig.4.1.1. Control block diagram 46
Fig.4.1.2. Schematic diagram of the simulation 47
Fig.4.2.1. The DC-link voltages and δVdc (a) PD method (b) POD method[이미지참조] 48
Fig.4.2.2. The CMV (vcm) and its frequency spectrum (a) PD method (b) POD method[이미지참조] 49
Fig.4.2.3. The pole voltages and δVdc during a sampling period (a) PD method (b) POD method[이미지참조] 50
Fig.4.2.4. The line-to-line voltage vab and grid currents (a) PD method (b) POD method[이미지참조] 51
Fig.4.2.5. The current reference, δVdc, and vcm when Cf is 5.5μF[이미지참조] 52
Fig.4.2.6. The current reference, δVdc, and vcm when Cf is 9μF[이미지참조] 53
Fig.4.2.7. The vcm before applying a new range of ZSV[이미지참조] 54
Fig.4.2.8. The vcm after applying a new range of ZSV[이미지참조] 54
Fig.4.2.9. The iₙₚ and vzs, and their range (a) Before (b) After applying a new range of ZSV[이미지참조] 55
Fig.4.2.10. The iₙₚ, iₙₚ*, and inp,anti (a) Before (b) After applying a new range of ZSV[이미지참조] 56
Fig.4.2.11. The δVdc (a) Before (b) After applying a new range of ZSV[이미지참조] 56
Fig.4.2.12. The vcm when Tmg is 5μs[이미지참조] 57
Fig.4.2.13. The iₙₚ, inp*, and δVdc when Tmg is 5μs[이미지참조] 57
Fig.4.2.14. The frequency spectrum of vcm when Tmg is (a) zero (b) 5μs[이미지참조] 58
Fig.4.2.15. The frequency spectrum of iₙₚ, inp*, and δVdc when Tmg is (a) zero (b) 5μs[이미지참조] 58
Fig.4.2.16. The vzs and its range (a) Before (b) After applying a new range of ZSV[이미지참조] 60
Fig.4.2.17. The δVdc and vcm (a) Before (b) After applying a new range of ZSV[이미지참조] 60
Fig.4.2.18. The δVdc and vcm when Tmg is Td[이미지참조] 61
Fig.4.2.19. The vzs and its range (a) Before (b) After applying a new range of ZSV[이미지참조] 61
Fig.4.2.20. The δVdc and vcm (a) Before (b) After applying a new range of ZSV[이미지참조] 62
Fig.4.2.21. The δVdc and vcm when Tmg is Td[이미지참조] 63
Fig.4.2.22. The vzs and its range (a) Before (b) After applying a new range of ZSV[이미지참조] 63
Fig.4.2.23. The δVdc and vcm (a) Before (b) After applying a new range of ZSV[이미지참조] 64
Fig.4.2.24. The vzs and its range (a) Before (b) After applying a new range of ZSV[이미지참조] 64
Fig.4.2.25. The δVdc and vcm (a) Before (b) After applying a new range of ZSV[이미지참조] 65
Fig.4.2.26. The δVdc and vcm when Tmg is Td[이미지참조] 65
Fig.4.2.27. The current reference, δVdc, and vcm when Tmg is Td[이미지참조] 66
Fig.4.2.28. The δVdc and vcm when δVdc is unbalanced (a) Before (b) After applying a new range of ZSV[이미지참조] 67
Fig.4.2.29. The icm and vcm when Cₚ is 1nF (a) PD method (b) POD method (c) After the limitation of ZSV[이미지참조] 69
Fig.4.2.30. The icm and vcm when Cₚ is 0.1μF (a) PD method (b) POD method (c) After the limitation of ZSV[이미지참조] 71
Fig.5.1.1. Influences by parasitic capacitances (a) Positive output current and (b) Negative output current 73
Fig.5.1.2. Influences by dead times and parasitic capacitances - Positive pole voltage reference 73
Fig.5.1.3. Influences by dead times and parasitic capacitances - Negative pole voltage reference 74