목차
1. 들어가며 1
2. Epitaxial Defects 2
2.1. Dislocation 2
2.2. Stacking Faults 3
2.3. Point Defects 4
3. 맺음말 6
참고문헌 6
Fig. 1. Schematic illustration of dislocation propagation in 4H-SiCepilayers grown on off-axis {0001} by chemical vapor deposition. 2
Fig. 2. Conversion ratio from basal-plane dislocations (BPD) to threading edge dislocations (TED) during SiC epitaxial growth as a function of growth rate: The growth temperature was 1650℃, and the thickness of epitaxial layers are about 22-25 μm. Both as-received and chemical-mechanically-polished substrates were employed. 3
Fig. 3. (a) Micro PL intensity mapping at 390nm (near bandedge emission) at room temperature obtained from a 72㎛-thick n-type 4H-SiC epilayer intentionally doped to 1×1015cm-3. (b) Optical microscopy image of the sample surface (same location) after molten KOH etching at 480℃ for 10 min. 3
Fig. 4. Real-color electroluminescence image depicting recombination induced SFs (purple triangular features), basal plane dislocations (red linear features), and in-grown stacking fault (blue feature at bottom) within a gridded pin diode at 15 mA injection. 4
Fig. 5. High-resolution TEM images taken from the major ingrown SFs in 4H-SiC epilayers grown at 72μm/h and the corresponding PL intensity mapping images at room temperature. (a) (4, 4), (b) (5, 3), (c) (6, 2) structures. 4
Fig. 6. Energy levels of major deep levels observed in as-grown n-type and p-type 4H-SiC epilayers. 5
Fig. 7. (a) DLTS spectra of an n-type 4H-SiC epilayer before and after thermal oxidation at 1300℃ for 5 h. (b) Depth profiles of the Z½ concentration before and after oxidation at 1300℃ for 10 min, 1 h, and 5 h, respectively. 5
Fig. 8. Dependence of measured lifetimes on the SiC epilayer thickness: The lifetimes before and after the two-step thermal treatment are plotted by closed and open circles, respectively. The simulated dependence of the lifetime on the epilayer thickness is also shown by dashed lines, for various bulk lifetimes of epilayers. 6