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Contents

Optimization of material and process for fine pitch LVSoP technology / Yong-Sung Eom ; Ji-Hye Son ; Hyun-Cheol Bae ; Kwang-Seong Choi ; Heung-Soap Choi 1

[요약] 1

I. Introduction 1

II. Materials and Experiment 2

1. Materials 2

2. Experiment 2

III. Results and Discussion 3

IV. Conclusion 6

Acknowledgement 6

References 6

[저자소개] 6

초록보기

For the formation of solder bumps with a fine pitch of 130 μm on a printed circuit board substrate, low-volume solder on pad (LVSoP) technology using a maskless method is developed for SAC305 solder with a high melting temperature of 220°C. The solder bump maker (SBM) paste and its process are quantitatively optimized to obtain a uniform solder bump height, which is almost equal to the height of the solder resist. For an understanding of chemorheological phenomena of SBM paste, differential scanning calorimetry, viscosity measurement, and physical flowing of SBM paste are precisely characterized and observed during LVSoP processing. The average height of the solder bumps and their maximum and minimum values are 14.7 μm, 18.3 μm, and 12.0 μm, respectively. It is expected that maskless LVSoP technology can be effectively used for a fine-pitch interconnection of a Cu pillar in the semiconductor packaging field.

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Guest Editorial 남은수 pp.558-558

참고문헌 (14건) : 자료제공( 네이버학술정보 )

참고문헌 목록에 대한 테이블로 번호, 참고문헌, 국회도서관 소장유무로 구성되어 있습니다.
번호 참고문헌 국회도서관 소장유무
1 S.C. Johnson, “Flip-Chip Packaging Becomes Competitive,” Semiconductor Int., May 2009. 미소장
2 C.P. Wang, Materials for Advanced Packaging, Springer Science Business Media LLC, 2009. 미소장
3 K. Hikasa and H. Irie, “Advanced Solder Bumping Technology Through Super Solder,” IEEE/CPMT Int Electron. Manufact. Technol. Symp., 1997, pp. 48-55. 미소장
4 M. Gerber et al., “Next Generation Fine Pitch Cu Pillar Technology – Enabling Next Generation Silicon Nodes,” Proc. Electron. Compon. Technol. Conf., 2001, pp.612-618. 미소장
5 Novel Bumping Material for Solder‐on‐Pad Technology 소장
6 Novel Maskless Bumping for 3D Integration 소장
7 Novel Bumping and Underfill Technologies for 3D IC Integration 소장
8 Novel Bumping Process for Solder on Pad Technology 소장
9 R. Agarwal et al., “Cu/Sn Microbumps Interconnect for 3D TSV Chip Stacking” Proc. Electron. Compon. Technol. Conf., 2010, pp. 858-863. 미소장
10 Characterization of polymer matrix and low melting point solder for anisotropic conductive film 네이버 미소장
11 Electrical Interconnection with a Smart ACA Composed of Fluxing Polymer and Solder Powder 소장
12 Characterization of a Hybrid Cu Paste as an Isotropic Conductive Adhesive 소장
13 Chemo-rheological characteristics of a self-assembling anisotropic conductive adhesive system containing a low-melting point solder 네이버 미소장
14 Catalytic behavior of Sn/Bi metal powder in anhydride-based epoxy curing. 네이버 미소장

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