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This paper presents the analog duty cycle corrector (DCC) for high-speed and accurate duty cycle correction. To enable high-speed and accurate duty cycle correction, the proposed design utilizes an integrator to extract error information as a DC voltage, while a set generator is introduced to significantly reduce lock time during initial setup time. The proposed circuit was designed using a 65-nm CMOS process. The proposed circuit supports input duty cycles ranging from 30% to 70% across a clock frequency range of 4 - 8 GHz and corrects them to 50% with an accuracy of ±0.5%. The active area of the design is 0.0053mm2, with a power consumption is 4.42 mW at 8 GHz.

권호기사

권호기사 목록 테이블로 기사명, 저자명, 페이지, 원문, 기사목차 순으로 되어있습니다.
기사명 저자명 페이지 원문 목차
(A) design technique for highly parallel pseudo-random ternary sequences generators Jusung Park, Jintae Kim p. 1-5
(A) duty-cycled continuous-time delta-sigma modulator for ExG biopotential acquisition Woo Yub Chun, Jung Hyup Lee p. 6-11
Design and optimization of centimeter-scale long-reach on-chip interconnect for wafer-level computing Jiyong Park, Gwangmin Jung, Doona Song, Jintae Kim p. 12-19
A4 - 8GHz analog duty cycle corrector with 30-70% correction range for high-speed serial interface Myeongju Park, Junyoung Song p. 20-24
Design study of a 120-GHz amplifier on InP HEMT technology J. Cho, J.H. Lee, Y.W. Kim, M. Kim p. 25-30
(A) multi-path hybrid DC-DC converter with reduced inductor current and wide voltage conversion ratio Jaekyun Kim, Chulwoo Kim p. 31-35
(A) high-efficiency hybrid buck-boost photovoltaic energy harvester with adaptive fractional open-circuit voltage maximum-power-point-tracking control Phan Dang Hung, Van Thai Trinh, Yechan Park, Minkyu Je p. 36-42
(A) 6-bit digitally controlled vector-sum phase shifter with current steering architecture Jeong Su Lee, Woong Joo Chang, Kwang Ho Jang, Tae Hwan Jang p. 43-48
Design of a 6-bit broadband differential digital attenuator using a hybrid topology for DC–13 GHz systems Jeong Hu Nam, Woong Joo Chang, Kwang Ho Jang, Tae Hwan Jang p. 49-54
Dynamic performance enhancement of a current-steering DAC using tree-structured routing and power mesh-based SI/PI optimization Inho Jang, Hyeonwoo Kim, Jiwon Seo, Minjae Seo p. 55-59
Triboelectric nanogenerator modeling and triboelectric nanogenerator-based pressure-sensor interface forimplantable total knee replacement Yunchul Chung, Minkyu Je p. 60-64
(A) CMOS LiDAR sensor using time-to-voltage converter for elder-care applications Somi Park, Sunkyung Lee, Bobin Seo, Sung Min Park p. 65-69
Design study of a 630-GHz injection-locked oscillator based on InP HBT technology Giyeong Nam, Jae-Sung Rieh p. 70-75

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