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Title Page

Contents

Abstract 13

1. Introduction 16

1-1. Silicon Photonics for High-Speed Interconnects 16

1-2. Silicon Photodetectors in Standard CMOS/BiCMOS Technology 20

2. Photodetectors in Standard CMOS/BiCMOS Technology 22

2-1. Characteristics of CMOS/BiCMOS Technology for Photodetectors 22

2-2. Silicon Photodetectors in Standard CMOS Technology 27

3. Characteristics of the Silicon APD Based on the P+/N-well Junction(이미지참조) 30

3-1. Device Description 30

3-2. Experimental Setup 32

3-3. DC Characteristics 34

3-3-1. Current-Voltage Characteristics 34

3-3-2. Responsivity and Avalanche Gain 37

3-4. AC Characteristics 39

3-4-1. Photodetection Frequency Response 39

3-4-2. Electrical Reflection Coefficient 41

4. Equivalent Circuit Model for Silicon APDs 43

4-1. Equivalent Circuit Model 43

4-2. Parameter-Extraction Process for the Equivalent Circuit Model 45

5. Design Considerations for Silicon-APD-Performance Enhancement 49

5-1. Guard-Ring-Dependent Characteristics 49

5-1-1. Device Structures and Simulation Results 50

5-1-2. Experimental Results 55

5-1-3. Discussions 60

5-2. Electrode-Dependent Characteristics 62

5-2-1. Test Structures 62

5-2-2. Experimental Results and Discussions 64

5-3. Silicide-Dependent Characteristics 66

5-3-1. Device Description 66

5-3-2. Experimental Results and Analyses With Equivalent Circuit Model 70

5-3-3. Discussions 77

5-4. Area-Dependent Characteristics 79

5-4-1. Device Structure 80

5-4-2. Experimental Results and Analyses With Equivalent Circuit Model 82

5-4-3. Discussions 90

5-5. Junction-Dependent Characteristics (1) 97

5-5-1. Device Structures 97

5-5-2. Experimental Results 100

5-5-3. Discussions 106

5-6. Junction-Dependent Characteristics (2) 109

5-6-1. Device Structures 109

5-6-2. Experimental Results and Discussions 111

6. Considerations about Optimal Conditions for Silicon-APDs 113

6-1. Bias-Voltage-Dependent Characteristics 113

6-1-1. Device Structure and Equivalent Circuit Model 114

6-1-2. Experimental Results and Analyses With Equivalent Circuit Model 117

6-1-3. Discussions 124

6-2. Optical-Power-Dependent Characteristics 128

6-2-1. Device Structure and Equivalent Circuit Model 128

6-2-2. Experimental Results and Analyses With Equivalent Circuit Model 131

6-2-3. Discussions 138

7. Summary 140

Bibliography 144

Publication Lists 148

List of Tables

Table 4-1. EXTRACTED PARAMETERS FOR THE CMOS-APD AT THE REVERSE BIAS VOLTAGE OF 12.3 V AND INCIDENT OPTICAL POWER OF 1 mW 48

Table 5-1. AVALANCHE GAIN: CALCULATION AND MEASUREMENT 61

Table 5-2. EXTRACTED PARAMETERS FOR CMOS-APDS WITH AND WITHOUT SILICIDE UNDER P+ CONTACTS(이미지참조) 75

Table 5-3. EXTRACTED PARAMETERS FOR CMOS-APDS ACCORDING TO DEVICE AREAS 88

Table 5-4. PERFORMANCE COMPARISON OF SILICON PHOTODETECTORS FABRICATED WITH STANDARD CMOS TECHNOLOGY 96

Table 5-5. PERFORMANCE COMPARISON OF SILICON AVALANCHE PHOTODETECTORS FABRICATED WITH STANDARD CMOS TECHNOLOGY 108

Table 6-1. EXTRACTED PARAMETERS FOR THE CMOS-APD AT DIFFERENT BIAS VOLTAGES 123

Table 6-2. EXTRACTED PARAMETERS FOR THE CMOS-APD AT DIFFERENT INCIDENT OPTICAL POWER 137

Table 7-1. OVERVIEW OF DESIGN CONSIDERATIONS FOR SILICON-APD-PERFORMANCE ENHANCEMENT 143

List of Figures

Fig. 1-1. Current status and future prospects for electrical and optical interconnects. 18

Fig. 1-2. Conceptual diagram of silicon photonics. 19

Fig. 2-1. Simplified cross section of typical twin-well CMOS transistors. 24

Fig. 2-2. Simplified band diagram for the N-well/P-substrate junction. 25

Fig. 2-3. Simplified cross section of standard SiGe BiCMOS technology. 26

Fig. 2-4. Cross sections of silicon photodetectors 29

Fig. 3-1. Structure of the P+/N-well CMOS-APD.(이미지참조) 31

Fig. 3-2. Experimental setups for CMOS-APD characterization 33

Fig. 3-3. Current-voltage characteristics of the CMOS-APD at P+ port and N+ port in N-well under illumination and dark conditions. The incident optical power is 1 mW.(이미지참조) 35

Fig. 3-4. Current-voltage characteristics of the CMOS-APDs at P+ port on different chips under the dark condition.(이미지참조) 36

Fig. 3-5. Responsivity and avalanche gain of the CMOS-APD at (a) P+ port and (b) N+ port in N-well as a function of the reverse bias voltage. The incident optical power is 1 mW.(이미지참조) 38

Fig. 3-6. Photodetection frequency responses of the CMOS-APD (a) at P+ port and N+ port in N-well at the reverse bias voltage of 12.3 V and (b) at P+ port in N-well at different bias voltages. The incident optical...(이미지참조) 40

Fig. 3-7. Electrical reflection coefficients of the CMOS-APD at P+ port from 50 MHz to 13.5 GHz at different bias voltages. The inset shows magnified images of the reflection coefficients.(이미지참조) 42

Fig. 4-1. Equivalent circuit model for CMOS-APDs. 44

Fig. 4-2. Measured and simulated photodetection frequency responses of the CMOS-APD at the reverse bias voltage of 12.3 V and incident optical power of 1 mW. The inset shows measured and simulated... 47

Fig. 5-1. Cross sections of CMOS-APDs 53

Fig. 5-2. Simulated electric-field profiles for the CMOS-APDs 54

Fig. 5-3. Current-voltage characteristics of the CMOS-APDs 57

Fig. 5-4. Measured responsivities and avalanche gains for the CMOS-APDs. 58

Fig. 5-5. Measured photodetection frequency responses of the CMOS-APDs. 59

Fig. 5-6. Simplified CMOS-APD layouts with (a) 1.3-μm and (b) 9.6-μm spacing multi-finger electrodes on 30 x 30-μm² optical windows. 63

Fig. 5-7. Measured photodetection frequency responses of the CMOS- APDs having (a) 1.3-μm and (b) 9.6-μm spacing multi-finger electrodes on optical windows at the optimal bias voltage. 65

Fig. 5-8. Simplified CMOS-APD layouts (a) without silicide and (b) with silicide under P+ contacts.(이미지참조) 68

Fig. 5-9. Structure and equivalent circuit model of the fabricated CMOS-APDs with parasitic resistance, Rp, at the output P+ port.(이미지참조) 69

Fig. 5-10. (a) Current characteristics and (b) responsivity and avalanche gain of CMOS-APDs as a function of the reverse bias voltage with and without silicide under P+ contacts. The insets are magnified current-...(이미지참조) 72

Fig. 5-11. Photodetection frequency responses of CMOS-APDs at different bias voltages (a) with silicide and (b) without silicide under P+ contacts.(이미지참조) 73

Fig. 5-12. Measured and simulated electrical reflection coefficients of CMOS-APDs from 50 MHz to 13.5 GHz with and without silicide under P+ contacts. Hollow circles represent measured data, and solid...(이미지참조) 74

Fig. 5-13. Measured and simulated photodetection frequency responses of CMOS-APDs with and without silicide under P+ contacts. Hollow circles represent measured data, and solid lines represent simulated...(이미지참조) 76

Fig. 5-14. Equivalent circuit model for CMOS-APDs. 81

Fig. 5-15. (a) Current-voltage characteristics of CMOS-APDs and (b) responsivity and avalanche gain of 10 x 10-μm² CMOS-APD as function of reverse bias voltage. 85

Fig. 5-16. Normalized photodetection frequency responses of the CMOS-APDs having different device areas. 86

Fig. 5-17. Measured and simulated electrical reflection coefficients for different CMOS-APDs at the reverse bias voltage of 10.25 V. Hollow circles represent the measured data and solid lines as the simulated... 87

Fig. 5-18. Measured and simulated photodetection frequency responses for different CMOS-APDs at the reverse bias voltage of 10.25 V. Hollow circles represent the measured data and solid lines as the... 89

Fig. 5-19. Normalized photodetection frequency responses of CMOS- APDs for the photogenerated-carrier transit time, the RC time constant, the inductive-peaking effect, and all the factors according to device... 93

Fig. 5-20. Normalized photodetection frequency responses of CMOS-APDs having different device areas for (a) all the factors，(b) the inductive-peaking effect，(c) the RC time constant，and (d) the... 94

Fig. 5-21. Normalized photodetection frequency responses of the CMOS-APDs having different device areas with and without the parasitics for (a) all the factors, (b) the inductive-peaking effect, and (c)... 95

Fig. 5-22. Cross sections of the fabricated CMOS-APDs 99

Fig. 5-23. Current-voltage characteristics of the CMOS-APDs under illumination and dark conditions 103

Fig. 5-24. Responsivities and avalanche gains of the CMOS-APDs as a function of the reverse bias voltage 104

Fig. 5-25. Relative photodetection frequency responses of the CMOS-APDs. 105

Fig. 5-26. Gain-bandwidth characteristic of the N+/P-well CMOS-APD.(이미지참조) 107

Fig. 5-27. Cross sections of two types of APDs based on (a) P+/N-well and (b) Base/Collector junctions.(이미지참조) 110

Fig. 5-28. Measured photodetection frequency responses of the CMOS-APD and HBT-APD based on p+/N-well and Base/Collector junctions, respectively.(이미지참조) 112

Fig. 6-1. Structure and equivalent circuit model of the fabricated CMOS-APD. 116

Fig. 6-2. (a) Current characteristics and (b) responsivity and avalanche gain of the CMOS-APD as a function of the reverse bias voltage. 119

Fig. 6-3. Photodetection frequency responses of the CMOS-APD at different bias voltages. 120

Fig. 6-4. Measured and simulated electrical reflection coefficients of the CMOS-APD from 50 MHz to 13.5 GHz. Hollow circles represent the measured data and solid lines as the simulated results. The inset... 121

Fig. 6-5. Measured and simulated photodetection frequency responses of the CMOS-APDs. Hollow circles represent the measured data and solid lines as the simulated results. 122

Fig. 6-6. (a) Normalized photodetection frequency responses without the photogenerated-carrier transit time and (b) inductor quality factors as a function of the frequency for the CMOS-APD at different bias... 126

Fig. 6-7. Simulated photodetection frequency responses of the CMOS- APD for photogenerated-carrier transit time，RLC components，and all the factors according to bias voltages. 127

Fig. 6-8. Structure and equivalent circuit model of the fabricated CMOS-APD. 130

Fig. 6-9. (a) Current characteristics and (b) responsivity and avalanche gain of the CMOS-APD as a function of the reverse bias voltage at different incident optical power. 133

Fig. 6-10. (a) Photodetection frequency responses of the CMOS-APD at different bias voltages when the incident optical power is 0 dBm. (b) Photodetection frequency response of the CMOS-APD at different... 134

Fig. 6-11. Measured and simulated electrical reflection coefficients of CMOS-APDs from 50 MHz to 13.5 GHz at different incident optical power when the reverse bias voltage is 12.3 V. Hollow circles and solid... 135

Fig. 6-12. Measured and simulated photodetection frequency responses of the CMOS-APD at different incident optical power when the reverse bias voltage is 12.3 V. Hollow circles represent measured data, and... 136

Fig. 6-13. Simulated photodetection frequency responses of the CMOS- APD for photogenerated-carrier transit time, RLC components, and all the factors according to incident optical power. 139

초록보기

 High-performance silicon avalanche photodetectors (APDs) are designed and fabricated with standard complementary metal-oxide-semiconductor (CMOS) technology and bipolar CMOS (BiCMOS) technology without any design or layout rule violation. To investigate the performance of CMOS-compatible silicon APDs (CMOS-APDs), DC and AC characteristics of the CMOS-APDs are experimentally characterized. In addition, equivalent circuit models for CMOS-APDs are developed to better understand CMOS-APD characteristics.

CMOS-APDs are investigated with several considerations such as guard ring (GR), electrode, silicide, area, and junction for the goal of identifying the factors that influence the CMOS-APD performance and achieving the optimal CMOS-APD performance. Several types of CMOS-APDs are realized with the considerations, and current characteristics, responsivity, avalanche gain, electrical reflection coefficients, and photodetection bandwidth for CMOS-APDs are measured and compared. In addition, their characteristics are analyzed with technology computer-aided-design (TCAD) simulation and the equivalent circuit models. From these investigations, dominant factors that influence the CMOS-APD performances are identified, and then the CMOS-APD is optimized. The optimized CMOS-APD shows the highest gain and photodetection bandwidth performances among CMOS-compatible photodetectors reported until now.

Then, with the optimized CMOS-APD, their characteristics are measured and compared at different bias voltages and incident optical power with the goal of achieving the optimal operating conditions. The characteristics depending on the reverse bias voltage and incident optical power are analyzed with equivalent circuit models, and consequently dominant limiting factors that influence the performances of CMOS-APDs are identified, and then the optimal operating conditions are clarified.

From these investigations, dominant factors that influence the CMOS-APD performances are identified, and then the optimal operating conditions are clarified. It is expected that the optimized CMOS-APDs can play an important role in silicon-photonics applications to achieve cost reduction of systems by enabling monolithic electronic-photonic integrated circuits based on the mature CMOS technology. In addition, the equivalent-circuit analysis can be very useful for realizing and understanding monolithically integrated optical receivers having germanium avalanche photodetectors as well as silicon avalanche photodetectors.

참고문헌 (31건) : 자료제공( 네이버학술정보 )

참고문헌 목록에 대한 테이블로 번호, 참고문헌, 국회도서관 소장유무로 구성되어 있습니다.
번호 참고문헌 국회도서관 소장유무
1 Silicon Photonics, Springer-Verlag, 2004. 미소장
2 Advances in silicon photonic devices for silicon-based optoelectronic applications 네이버 미소장
3 CMOS Photonics for High-Speed Interconnects 네이버 미소장
4 Silicon Photonics 네이버 미소장
5 The Impact of Silicon Photonics 네이버 미소장
6 Development of CMOS-Compatible Integrated Silicon Photonics Devices 네이버 미소장
7 The Past, Present, and Future of Silicon Photonics 네이버 미소장
8 Si microphotonics for optical interconnection 네이버 미소장
9 Monolithic germanium/silicon avalanche photodiodes with 340 GHz gain–bandwidth product 네이버 미소장
10 Frequency response and bandwidth enhancement in Ge/Si avalanche photodiodes with over 840 GHz gain-bandwidth-product. 네이버 미소장
11 Reinventing germanium avalanche photodetector for nanophotonic on-chip optical interconnects 네이버 미소장
12 “A 2.5 Gbps CMOS fully integrated optical receiver with lateral PIN detector,” in Proc. of IEEE Custom Integrated Circuits Conference, pp. 293–296, Sep. 2007. 미소장
13 A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer 네이버 미소장
14 “Power Efficient 4.5Gbit/s Optical Receiver in 130nm CMOS with Integrated Photodiode,” in Proc. of European Solid-State Circuits Conference, pp. 162–165, Sep. 2008. 미소장
15 A 10-Gb/s OEIC with Meshed Spatially-Modulated Photo Detector in 0.18-$\mu{\hbox {m}}$ CMOS Technology 네이버 미소장
16 A High-Speed and High-Responsivity Photodiode in Standard CMOS Technology 네이버 미소장
17 Bandwidth enhancement in Si photodiode by eliminating slow diffusion photocarriers 네이버 미소장
18 Si avalanche photodetectors fabricated in standard complementary metal-oxide-semiconductor process 네이버 미소장
19 A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product. 네이버 미소장
20 Performance comparison of two types of silicon avalanche photodetectors based on N-well/P-substrate and P^+^/N-well junctions fabricated with standard CMOS technology 소장
21 Effects of Guard-Ring Structures on the Performance of Silicon Avalanche Photodetectors Fabricated With Standard CMOS Technology 네이버 미소장
22 1-Gb/s integrated optical detectors and receivers in commercial CMOS technologies 네이버 미소장
23 High-performance BiCMOS technologies without epitaxially-buried subcollectors and deep trenches 네이버 미소장
24 A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication 네이버 미소장
25 Physics of Semiconductor Devices, 3rd ed., Wiley, 2007. 미소장
26 Equivalent Circuit Model for Si Avalanche Photodetectors Fabricated in Standard CMOS Process 네이버 미소장
27 Small-signal characteristics of a read diode under conditions of field-dependent velocity and finite reverse saturation current 네이버 미소장
28 Analysis of high speed p-i-n photodiode S-parameters by a novel small-signal equivalent circuit model 네이버 미소장
29 Ionization Rates for Electrons and Holes in Silicon 네이버 미소장
30 Hole-Injection-Type and Electron-Injection-Type Silicon Avalanche Photodiodes Fabricated by Standard 0.18-$\mu$m CMOS Process 네이버 미소장
31 No 네이버 미소장

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