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동의어 포함
Title Page
ABSTRACT
Contents
List of Abbreviations 12
List of Symbols 13
Chapter 1: Introduction 14
1.1. Motivation: Future Electronics with Various Form-Factors 14
1.2. Organic Thin-Film Transistors (OTFTs) for Future Electronics 15
1.3. Major Issues in OTFTs 17
Chapter 2: Major Components of OTFTs and Their Desired Properties 19
2.1. Overview 19
2.2. Organic Semiconductors (OSCs) for OTFTs 20
2.2.1. Gate Insulating Layer (GI) Surfaces for p-type Organic Channels 21
2.2.2. GI Surfaces for n-type Organic Channels 23
2.3. Electrical Contact to Organic Channel Layers 25
2.3.1. Source/Drain (S/D) Contact for p-Channel OTFTs 25
2.3.2. Source/Drain (S/D) Contact for n-Channel OTFTs 27
2.4. Gate Insulating Layer (GIs) for OTFTs 28
2.4.1. Role of GIs in TFTs 28
2.4.2. GIs for Future Electronics with Various Form-Factors 29
2.5. Summary 30
Chapter 3: Solution-Processed Polymeric Insulating Layers and Their Applications to TFTs 31
3.1. Requirements and Issues for Solution-Processed Polymer GIs 31
3.2. Cross-Linked Fluoropolymer GIs (C-Cytop) 31
3.3. Low-Voltage OTFTs using C-Cytop GIs 33
3.3.1. OTFTs using Ultra-Thin C-Cytop GIs 33
3.3.2. Threshold-Voltage Control for Optimum Low-Voltage Operation 34
3.4. Colorless Transparent OTFTs (TOTFTs) using C-Cytop GIs 37
3.4.1. Motivation of TOTFTs 37
3.4.2. Pre-Reported TOTFTs and Their Drawback 37
3.4.3. Wide-Gap OSCs: BTBT Derivatives 37
3.4.4. Transparent S/D Electrodes: DMD Electrodes 39
3.4.5. Transparent Gate Electrodes & GIs: ITO & C-Cytop 40
3.4.6. Design and Fabrication of TOTFS 42
3.4.7. Optical Optimization for High Transparency 43
3.4.8. Transmittances of Fabrication Results 44
3.4.9. Electrical Characteristics of TOTFTs 46
3.5. Limitation of Solution-Processed C-Cytop Insulating Layers 46
3.6. Summary 47
Chapter 4: Vapor-Processed High-Quality Polymeric Insulating Layers and Their Applications to TFTs 48
4.1. Requirements of a New Process for Polymer GIs 48
4.2. Initiated Chemical Vapor Deposition (iCVD) Process 49
4.3. Promising Prospects of iCVD Processed Polymer Layers as Insulator 50
4.4. Representative Polymer Films by iCVD Process: pV3D3 51
4.4.1. Chemical Structure of pV3D3 Films 52
4.4.2. Energy-Band Structure of pV3D3 Films 53
4.4.3. Thin-Film Morphology and Dielectric Constant of pV3D3 Layers 53
4.5. iCVD Processed pV3D3 Polymer Layers as Insulating Layers 55
4.5.1. Capacitance and Insulating Property of pV3D3 Layers 55
4.5.2. Conduction Mechanism through pV3D3 Layers 56
4.6. Bottom-Gated (BG) OTFTs using pV3D3 GIs 59
4.6.1. pV3D3 Surface for Organic Channel Layers 59
4.6.2. Low-Voltage C60 OTFTs using pV3D3 Layers(이미지참조) 60
4.6.3. Effects of Low Work-Function Source/Drain Electrodes 61
4.6.4. Plasma-Grown AlOx Sub-Layers to Enhance Insulating Property(이미지참조) 62
4.6.5. Mobility Degradation Issues with Ultra-thin pV3D3 Layers 63
4.6.6. iCVD Processed Polymer GIs on Various Gate Electrodes 64
4.7. Top-Gated (TG) OTFTs using pV3D3 GIs 65
4.8. Top-Gated (TG) Oxide TFTs using pV3D3 Gls 67
4.9. Flexible OTFTs Arrays on Large Plastic Substrates 68
4.10. OTFTs on Cellophane Tapes: Sticker Electronics 70
4.11. Summary 71
Chapter 5: Summary & Conclusion 72
5.1. Summary 72
5.1.1. OTFTs for Future Electronics and Requirements for Organic Insulating Layers 72
5.1.2. Solution Processed Polymer Insulating Layers and Low-Voltage OTFTs 72
5.1.3. iCVD Processed Polymer Insulating Layers and Low-Voltage TFTs 73
5.1.4. Flexible OTFTs using Polymer Insulating Layers 73
5.1.5. Colorless Transparent OTFTs using Wide-Gap Organic Channel Layers 73
5.2. Conclusion 74
Appendix A: Optical Band-Gap of Organic Semiconductors 75
Summary (in Korean) 76
Curriculum Vitae 77
References 80
Figure 1-1| Examples of future electronics using OTFTs 16
Figure 2-1| Structure and simple model of typical OTFTs 19
Figure 2-2| Pentacene TFTs with various GI surfaces. 21
Figure 2-3| DNTT TFTs with various GI surfaces. 23
Figure 2-4| C60 TFTs with various GI surfaces.(이미지참조) 24
Figure 2-5| Pentacene TFTs with various S/D contacts. 26
Figure 2-6| DNTT TFTs with various S/D contacts. 27
Figure 2-7| C60 TFTs with various S/D contacts.(이미지참조) 28
Figure 2-8| Diagrams about roles and issues of GIs in OTFTs for future electronics. 30
Figure 3-1| Cross-linked Cytop (C-Cytop) as insulating layers. 32
Figure 3-2| Low-voltage pentacene TFTs with ultra-thin C-Cytop GIs 33
Figure 3-3| Voltage shift effects of transition-metal-oxide gate surfaces on OTFTs. 35
Figure 3-4| Operation stability of petacene TFTs with various gate electrodes. 36
Figure 3-5| Transparency of various OSCs. 39
Figure 3-6| DPh-BTBT TFTs with Various S/D electrodes. 40
Figure 3-7| Ultra-thin C-Cytop GIs and ITO gate electrodes for DPh-BTBT TFTs. 41
Figure 3-8| Structure of DPh-BTBT TOTFTs with multilayer electrodes. 42
Figure 3-9| Optical constants and calculated TLum of four positions vs. dZnS and dWO3.(이미지참조) 44
Figure 3-10| Transmittances (T) and pictures of fabricated DPh-BTBT TOTFTs. 45
Figure 3-11| Electrical characteristics of optimized DPh-BTBT TFTs. 46
Figure 3-12| C-Cytop layers with high applied electric field 47
Figure 4-1| Schematic procedure of Initiated chemical vapor deposition (iCVD). 49
Figure 4-2| Insulating property of various iCVD processed polymer insulating layrs. 50
Figure 4-3| Chemical structures of V3D3, intiator, and pV3D3. 51
Figure 4-4| Chemical Structure of iCVD processed pV3D3 layers. 52
Figure 4-5| Energy band-gap of pV3D3 layers. 53
Figure 4-6| Microscopic images and elemental analysis results of pV3D3 thin-films. 54
Figure 4-7| Electrical property and uniformity of pV3D3 insulaitng layers. 55
Figure 4-8| Various measurements to analyzie comduction mechanism of pV3D3 layers. 57
Figure 4-9| Pentacene and C60 TFTs with pV3D3 GIs.(이미지참조) 59
Figure 4-10| C60 TFTs with pV3D3 GIs of various thickensses.(이미지참조) 60
Figure 4-11| Leakage current in the MIM devices with asymmetric electrodes. 61
Figure 4-12| The effects of O₂-plasma grown AlOx on Al bottom electrodes.(이미지참조) 62
Figure 4-13| BG C60 TFTs with AlOx/pV3D3 insulating layers.(이미지참조) 63
Figure 4-14| The mobility of BG C60 TFT with pV3D3 GIs and GI surface morphologies.(이미지참조) 64
Figure 4-15| BG C60 TFTs using pV3D3 GIs on various gate electrodes.(이미지참조) 65
Figure 4-16| TG P3HT TFTs using PMMA and pV3D3 as GIs 66
Figure 4-17| TG IGZO TFTs with pV3D3 GIs 68
Figure 4-18| Low-voltage TG P3HT TFT array on a Large-area PEN substrate. 69
Figure 4-19| BG C60 TFTS on various substrates and sticker electronics.(이미지참조) 70
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