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Contents

Simulation and fabrication studies of semi-superjunction trench power MOSFETs by RSO process with silicon nitride layer / Kyoung Il Na ; Sang Gi Kim ; Jin Gun Koo ; Jong Dae Kim ; Yil Suk Yang ; Jin Ho Lee 1

[요약] 1

I. Introduction 1

II. New RSO Process 2

III. Device Simulation 2

IV. Device Results 4

V. Conclusion 4

References 4

초록보기

In this letter, we propose a new RESURF stepped oxide (RSO) process to make a semi-superjunction (semi-SJ) trench double-diffused MOSFET (TDMOS). In this new process, the thick single insulation layer (SiO_2) of a conventional device is replaced by a multilayered insulator (SiO_2/SiNx/TEOS) to improve the process and electrical properties. To compare the electrical properties of the conventional RSO TDMOS to those of the proposed TDMOS, that is, the nitride_RSO TDMOS, simulation studies are performed using a TCAD simulator. The nitride_RSO TDMOS has superior properties compared to those of the RSO TDMOS, in terms of drain current and on-resistance, owing to a high nitride permittivity. Moreover, variations in the electrical properties of the nitride_RSO TDMOS are investigated using various devices, pitch sizes, and thicknesses of the insulator. Along with an increase of the device pitch size and the thickness of the insulator, the breakdown voltage slowly improves due to a vertical field plate effect; however, the drain current and on-resistance degenerate, owing to a shrinking of the drift width. The nitride_RSO TDMOS is successfully fabricated, and the blocking voltage and specific on-resistance are 108 V and 1.1 mΩ㎠, respectively.

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참고문헌 (12건) : 자료제공( 네이버학술정보 )

참고문헌 목록에 대한 테이블로 번호, 참고문헌, 국회도서관 소장유무로 구성되어 있습니다.
번호 참고문헌 국회도서관 소장유무
1 P. Goarin et al., “Split-Gate Resurf Stepped Oxide (RSO) MOSFETs for 25V Applications with Record Low Gate-to-Drain Charge,” Proc. ISPSD, 2007, pp. 61-64. 미소장
2 G.E.J. Koops et al., “Resurf Stepped Oxide (RSO) MOSFET for 85V Having a Record Low Specific On-Resistance,” Proc. ISPSD, 2004, pp. 185-188. 미소장
3 Gate Enhanced Power UMOSFET With Ultralow On-Resistance 네이버 미소장
4 P. Moens et al., “XtreMOS: The First Integrated Power Transistor Breaking the Silicon Limit,” Proc. IEDM. 2006, pp.1-4. 미소장
5 Design of 100-V Super-Junction Trench Power MOSFET with Low On-Resistance 소장
6 W. Saito et al., “High Breakdown Voltage (>1000 V) Semi-Superjunction MOSFETs Using 600-V Class Superjunction MOSFET Process,” IEEE Trans. Electron Devices, vol. 52, no. 10, Oct. 2005, pp. 2317-2322. 미소장
7 Y. Miura, H. Ninomiya, and K. Kobayashi, “High Performance Superjunction UMOSFETs with Split P-Columns Fabricated by Multi-Ion-Implantations,” Proc. ISPSD, 2005, pp. 39-42. 미소장
8 S. Yamauchi et al., “Fabrication of High Aspect Ratio Doping Region by Using Trench Filling of Epitaxial Si Growth,” Proc. ISPSD, 2001, pp. 363-366. 미소장
9 T. Minato et al., “Which Is Cooler, Trench or Muiti-Epitaxy? Cutting-Edge Approach for the Silicon Limit by the Super Trench Power MOS-FET (STM),” Proc. ISPSD, 2000, pp. 73-76. 미소장
10 The Effect of Charge Imbalance on Superjunction Power Devices: An Exact Analytical Solution 네이버 미소장
11 Mobility-enhancement technologies 네이버 미소장
12 M.A. Gajda et al., “Industrialisation of Resurf Stepped Oxide Technology for Power Transistors,” Proc. ISPSD, 2006, pp. 1-4. 미소장

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